Latency 101 문서 원본 보기

[[분류: 시스템 벤치마크]]

== Stroage Latency Comparison ==
<syntaxhighlight lang="c" line="1">
L1 cache reference                           0.5 ns
Branch mispredict                            5   ns
L2 cache reference                           7   ns                      14x L1 cache
Mutex lock/unlock                           25   ns        
VMFUNC with eptp switching                  54   ns
Main memory reference                      100   ns                      20x L2 cache, 200x L1 cache
getpid                                     120   ns
CR3 Update without TLB flush               120   ns
Compress 1K bytes with Zippy             3,000   ns        3 us
Send 1K bytes over 1 Gbps network       10,000   ns       10 us
Read 4K randomly from SSD*             150,000   ns      150 us          ~1GB/sec SSD
Read 1 MB sequentially from memory     250,000   ns      250 us
Round trip within same datacenter      500,000   ns      500 us
Read 1 MB sequentially from SSD*     1,000,000   ns    1,000 us    1 ms  ~1GB/sec SSD, 4X memory
Disk seek                           10,000,000   ns   10,000 us   10 ms  20x datacenter roundtrip
Read 1 MB sequentially from disk    20,000,000   ns   20,000 us   20 ms  80x memory, 20X SSD
Send packet CA->Netherlands->CA    150,000,000   ns  150,000 us  150 ms
</syntaxhighlight>
== Instructions ==
<syntaxhighlight lang="c" line="1">
MOV                                           1   cycles
JMP (Short)                                   1   cycles
JMP (Far)                                 16-20   cycles
CALL (Far)                                16-22   cycles
CALL (Near)                                   3   cycles
INT                                          33   cycles
IRET                                         32   cycles
CLI                                         8-9   cycles
STI                                       16-17   cycles
RDTSC                                         5   cycles
WRPKRU                                       22   cycles
RDPKRU                                        7   cycles
WRMSR (0x6E1 PKS)                           320   cycles
RDMSR (0x6E1 PKS)                           120   cycles
</syntaxhighlight>

== 참고 ==
# https://gist.github.com/jboner/2841832/forks
# https://www.agner.org/optimize/instruction_tables.pdf